David Vorick of Obelisk alerted me to the appearance of
http://www.innosilicon.com/html/grin-miner/index.html
Notice how crucial specs are still missing, to be added by April 15.
It doesn’t even say whether this is limited to Cuckatoo31.
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Count me out. Innosilicon wants $2,000 without any performance data at all? This is even worse than their Houdini A10 Ethereum Miner that no one has seen beyond some press announcements.
Decision to go for an Obelisk miner seems like a slam dunk by comparison.
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It says you can get a full refund within two weeks of spec announcement. Obelisk doesn’t have the experience inno does.
Anyone interested in pooling money to get the bare minimum order of 50?
Looks nice. At this point since there seems to be no out of box miner, I would like to build one. I’m a little rusty on building rigs so I need to find a complete list of items needed (down to the smallest part) to build my rig.
I want to build a really, really nice rig, since I really like Grin.
Thanks
Gotta love that fake site warning at the bottom of the page in combination with their lack of TLS.
Can it be worse than 1x 2080ti and 2x 1080ti that you could get for the same money?
Try to not tempt fate with the mining industry, because yes, yes, I do believe asics so poorly designed or margins so absurd that they are less then gpu’s is on the table. Its not a likely outcome, but I don’t think caustion in that industry is ever misplaced
Why they can´t draw at least some estimated hashrate.
Their “many times more” specification is very childish & untrusted.
I guess the problem is they just don’t know. To solve this problem in ASIC you need a bit-addressable memory with as many read/write ports as possible. I don’t know of the off-the-shelf memory like that.
Modern memories achieve high throughput by gluing bits together in large chunks (lines). DRAM designs use 64byte lines (512 bits). That’s useless if you are interested to read one bit.
Example calculation with one-bit addressable memory:
- 4G/s (not that many times more rate)
- 5ns one bit read latency
- 10,000,000,000 bit reads or writes to solve C31 (estimate on the low end)
You need a memory with 10000000000 * 4 * 0.000000005 = 200 read ports and 200 write ports. That’s 6400+ pin chip. Normal chips have up to hundreds of pins and memories have up to 8 ports. I declare this approach infeasible.
So what can you do? You have two options:
- Solder 2048 1Mbit chips on a board and implement some crazy dispatch&buffering logic to get right bits written to/read from the right chips. This will increase latency quite a bit so your hashing logic needs to be more complex to tolerate latency and keep the bandwidth up.
- Do mean mining on an ASIC. This means you need 8GB RAM with high sequential throughput. You don’t save much compared to GPU because memory is a significant portion of the cost.
Neither of these approaches seems great and it’s even harder to estimate how good/bad results you will get without some simulation of the prototype product.
Thanks for detailed explanation.
But why did Obelisk already come with an ASIC miner ( GRN1), able to perform at least 100 graphs per second and they did not even produce it yet?
If they did, why is Innosiliconso so shy to introduce their badass miner?
i think their asic is not ready yet.
Innosilicon is claiming to be able to ship their unit by the end of the summer. If they are able to achieve that, they should at this point have a very good idea of what the specifications are. To ship on that timeframe you basically need to tape-out in the next 30 days, and that’s just not going to happen if you don’t even know the general architecture.
It’s really strange that they don’t want to release specs, given that they always make a big point of highlighting how much further ahead their miner is from any of the competition.
We have highly progressed chip designs and accurate simulations (+/- 10% for speed, +/- 30% for power) describing the performance of the chip. All modern chip design processes have these simulations available long before the chip is ready for production.