Grin Improvement Proposal 1: put later phase outs on hold and rephrase primary PoW commitment

This requirement of 2 graphs per second is rather low even by your own standard.

Per my calculation, your single chip approach to have 1GiB of SRAM will have >50W per chip. So 1000W/50W=20 Chips for 200 Graphs or at least 10 Graphs per chip/instance. So your proposed requirement seem to contradict your own spec. I think your plan of doing a CC31 only miner is not a good plan aside from any technical risks. It puts your buyer at rather high risk of not able to even recover their principal investment. Both Single-chip and Multiple-chip approaches should all try to achieve a balance between compatibility and performance. I believe in the best interest of your investors Obelisk should take CC32 compatibility into account on GRIN1.
http://www.innosilicon.com/html/grin-miner/index.html
Here is a link to our solution. Not only is it CC31/32 compatible, the power consumption is only around 500W and the Graph per Second number will blow you away. I want to let you know that instead of spending all the effort doing audit and finger crossing, Innosilicon has an open ASIC model and welcome collaboration from Obelisk and other members of the community. You can use our ASICs to build your machine and we have a proven track record of delivering working ASICs on first silicon.